A Sub-100 mW Dual-Core HOG Accelerator VLSI for Parallel Feature Extraction Processing for HDTV Resolution Video.
Kosuke MizunoKenta TakagiYosuke TerachiShintaro IzumiHiroshi KawaguchiMasahiko YoshimotoPublished in: IEICE Trans. Electron. (2013)
Keyphrases
- feature extraction
- high definition
- hd video
- real time
- parallel implementation
- video processing
- video data
- compute intensive
- high definition television
- video streams
- distributed processing
- high resolution
- image processing
- wavelet transform
- feature vectors
- temporal resolution
- signal processing
- highest resolution
- power consumption
- data flow
- parallel processing
- video content
- object detection
- preprocessing
- video sequences
- feature selection
- higher resolution
- video clips
- processor array
- computer architecture
- principal component analysis
- face recognition
- parallel architecture
- parallel execution
- high frame rate
- vlsi design
- low power
- feature set
- image classification
- low resolution
- video frames
- multimedia
- video coding
- computer vision
- processing elements
- parallel computers
- video signals
- massively parallel
- low cost
- power plant
- high speed
- pedestrian detection
- texture analysis
- action recognition
- texture features