Reduced Memory Zerotree Coding Algorithm for Hardware Implementation.
Wen-Kuo LinBrian Wai-Him NgNeil BurgessPublished in: ICMCS, Vol. 2 (1999)
Keyphrases
- hardware implementation
- fpga implementation
- hardware architecture
- computational complexity
- signal processing
- memory requirements
- memory management
- software implementation
- parallel architecture
- image processing algorithms
- pipeline architecture
- low memory
- dedicated hardware
- hardware design
- pattern recognition
- fpga device
- field programmable gate array
- real time
- parallel implementation
- rate distortion
- feature extraction
- image processing