Login / Signup

Structural Gate Decomposition for Depth-Optimal Technology Mapping in LUT-based FPGA Design.

Jason CongYean-Yow Hwang
Published in: DAC (1996)
Keyphrases
  • optimal design
  • case study
  • hardware design
  • engineering design
  • cmos technology
  • gate array
  • design process
  • cost effective
  • real time
  • worst case
  • high speed
  • single chip
  • interaction design
  • lookup table
  • enabling technology