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Structural Gate Decomposition for Depth-Optimal Technology Mapping in LUT-based FPGA Design.
Jason Cong
Yean-Yow Hwang
Published in:
DAC (1996)
Keyphrases
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optimal design
case study
hardware design
engineering design
cmos technology
gate array
design process
cost effective
real time
worst case
high speed
single chip
interaction design
lookup table
enabling technology