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A small chip area 12-b 300MS/s Current Steering CMOS D/A converter based on a laminated-step layout technique.

Byungseung LeeByungill KimJuneseok LeeSanghoon HwangMinkyu SongTad Wysocki
Published in: ECCTD (2007)
Keyphrases
  • low voltage
  • high speed
  • analog vlsi
  • low cost
  • circuit design
  • cmos technology
  • random access memory
  • small number
  • power consumption
  • neural network
  • low power
  • single chip
  • analog to digital converter