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Automated flow for generating CMOS custom memory bit map between logical and physical implementation.
Baker Mohammad
Nadeem Eleyan
Greg Seok
Hong Kim
Published in:
IDT (2013)
Keyphrases
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analog to digital converter
random access memory
high speed
circuit design
low cost
domain specific
design considerations
memory management
maximum a posteriori
efficient implementation
semi automated
memory requirements
fully automated
memory space
virtual memory
flow patterns