Design of Low Power, High Performance FIR Filter Using Modified Differential Evolution Algorithm.
K. Srinivasa ReddyM. S. BharathS. K. SahooS. SinhaJ. P. ReddyPublished in: ISED (2011)
Keyphrases
- low power
- low power consumption
- differential evolution algorithm
- low cost
- power consumption
- high speed
- single chip
- fir filters
- vlsi architecture
- logic circuits
- cmos technology
- ultra low power
- differential evolution
- gate array
- filter design
- signal processor
- power reduction
- evolutionary algorithm
- multiscale
- vlsi implementation
- real time
- image sensor
- finite impulse response
- computer systems
- mixed signal
- genetic algorithm