A unified design methodology for CMOS tapered buffers.

Brian S. Cherkauer Eby G. Friedman

Published in: IEEE Trans. Very Large Scale Integr. Syst. (1995)

Keyphrases

design methodology
chip design
design criteria
design process
physical design
design methodologies
design procedure
object oriented
fuzzy neural network
low cost
power consumption
hardware software
power dissipation
learning algorithm
formal specification
low power
convergence rate
web services
decision making