TMA: Tera-MACs/W Neural Hardware Inference Accelerator with a Multiplier-less Massive Parallel Processor.
Hyunbin ParkDohyun KimShiho KimPublished in: CoRR (2019)
Keyphrases
- parallel processors
- compute intensive
- single processor
- processing elements
- hardware implementation
- network architecture
- field programmable gate array
- search problems
- precedence constraints
- neural network
- floating point
- massive amounts
- parallel implementation
- low cost
- associative memory
- scheduling problem
- parallel version
- genetic algorithm