High Performance and Energy-Efficient On-Chip Cache Using Dual Port (1R/1W) Spin-Orbit Torque MRAM.
Yeongkyo SeoKon-Woo KwonXuanyao FongKaushik RoyPublished in: IEEE J. Emerg. Sel. Topics Circuits Syst. (2016)
Keyphrases
- energy efficient
- random access memory
- embedded dram
- memory access
- wireless sensor networks
- design considerations
- energy consumption
- memory subsystem
- multithreading
- sensor networks
- low overhead
- main memory
- data access
- processor core
- low voltage
- base station
- energy efficiency
- multi core architecture
- high speed
- low cost
- query processing
- memory management
- data dissemination
- distributed memory
- parallel computing
- data transmission
- sensor nodes
- routing protocol
- cache misses
- routing algorithm
- mobile agents
- flash memory
- access patterns
- prefetching