Formal verification of SysML diagram using case studies of real-time system.

Published in: Innov. Syst. Softw. Eng. (2018)

Keyphrases

formal verification
real time
case study
model checking
symbolic model checking
model checker
formal methods
safety analysis
lessons learned
bounded model checking
automated verification
open source
low cost
knowledge based systems
real world
modeling language
control system