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A Prediction Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation.

Jae-Gon LeeMoo-Kyoung ChungKi-Yong AhnSang-Heon LeeChong-Min Kyung
Published in: DATE (2005)
Keyphrases
  • hardware software
  • hardware and software
  • hw sw
  • packet size
  • real time
  • software engineering
  • prediction model
  • embedded systems
  • sensor networks
  • multi core processors