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A Logic-Based Approach for the Verification of UML Timed Models.

Luciano BaresiAngelo MorzentiAlfredo MottaMohammad Mehdi Pourhashem KallehbastiMatteo Rossi
Published in: ACM Trans. Softw. Eng. Methodol. (2017)
Keyphrases
  • statistical models
  • asynchronous circuits
  • probabilistic model
  • logic programming
  • model checking
  • uml models
  • information systems
  • case study
  • automated reasoning
  • verification method
  • timed automata