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A 12.4TOPS/W, 20% Less Gate Count Bidirectional Phase Domain MAC Circuit for DNN Inference Applications.
Yosuke Toyama
Kentaro Yoshioka
Koichiro Ban
Akihide Sai
Kohei Onizuka
Published in:
A-SSCC (2018)
Keyphrases
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domain independent
multiple input
high speed
domain specific
bayesian networks
semi supervised
cross domain
inference engine
electronic circuits