Hardware implementation of the discrete fourier transform with non-power-of-two problem size.
Peter A. MilderFranz FranchettiJames C. HoeMarkus PüschelPublished in: ICASSP (2010)
Keyphrases
- hardware implementation
- efficient implementation
- signal processing
- dedicated hardware
- software implementation
- fpga implementation
- image processing algorithms
- field programmable gate array
- power consumption
- hardware architecture
- pipeline architecture
- memory management
- hardware design
- image compression
- data streams
- computer vision
- data mining