High-speed and low-power embedded TEC BCH scheme for ReRAM array.

Kun Zhang Haiyang Liu Xu Zheng Xiaoxin Xu Hongyang Hu Junyu Zhang

Published in: IEICE Electron. Express (2023)

Keyphrases

low power
high speed
image sensor
power consumption
low cost
single chip
focal plane
vlsi circuits
wireless transmission
high power
digital signal processing
vlsi architecture
frame rate
power dissipation
real time
logic circuits
cmos technology
embedded systems
power reduction
infrared
gate array