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Design Flow of Accelerating Hybrid Extremely Low Bit-width Neural Network in Embedded FPGA.
Junsong Wang
Qiuwen Lou
Xiaofan Zhang
Chao Zhu
Yonghua Lin
Deming Chen
Published in:
CoRR (2018)
Keyphrases
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neural network
hw sw
embedded systems
case study
hardware design
hardware architectures
hardware software
single chip
hybrid learning
low cost
neural nets
multi layer
recurrent neural networks
feed forward
design process
hardware architecture
high speed
xilinx virtex
pattern recognition