Power-Efficient Sum of Absolute Differences Hardware Architecture Using Adder Compressors for Integer Motion Estimation Design.
Bianca SilveiraGuilherme PaimBrunno AbreuMateus GrellertCláudio Machado DinizEduardo A. C. da CostaSergio BampiPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2017)