A low-power dynamic comparator with digital calibration for reduced offset mismatch.

Denis Guangyin Chen Amine Bermak

Published in: ISCAS (2012)

Keyphrases

low power
power consumption
low cost
high speed
mixed signal
vlsi circuits
single chip
high power
low power consumption
digital signal processing
wireless transmission
logic circuits
vlsi architecture
image sensor
signal processor
real time
power reduction
wireless sensor networks