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A many-core architecture for in-memory data processing.

Sandeep R. AgrawalSam IdiculaArun RaghavanEvangelos VlachosVenkatraman GovindarajuVenkatanathan VaradarajanCagri BalkesenGeorgios GiannikisCharlie RothNipun AgarwalEric Sedlar
Published in: MICRO (2017)
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