Power Reduction in Microprocessor Chips by Gated Clock Routing.

Jaewon Oh Massoud Pedram

Published in: ASP-DAC (1998)

Keyphrases

power reduction
high speed
low power
power consumption
power dissipation
chip design
power saving
ibm zenterprise
routing algorithm
ad hoc networks
wireless ad hoc networks
routing protocol
digital signal processing
energy efficiency
data center
real time
design methodology
message passing
clock frequency