A systolic array architecture for the discrete sine transform.
Doru-Florin ChiperM. N. S. SwamyM. Omair AhmadThanos StouraitisPublished in: IEEE Trans. Signal Process. (2002)
Keyphrases
- systolic array
- discrete fourier transform
- parallel architecture
- data flow
- reconfigurable architecture
- translation invariant
- discrete geometry
- frequency domain
- network architecture
- hartley transform
- database
- finite number
- fourier transform
- data sets
- real time
- radon transform
- hardware implementation
- multi view
- multiscale