The Future of Low Power Design is Here: IEEE P1801, aka, UPF 2.0.
Stephen BaileyPublished in: VLSI Design (2009)
Keyphrases
- low power
- single chip
- low cost
- power consumption
- high speed
- vlsi architecture
- low power consumption
- logic circuits
- digital signal processing
- gate array
- power reduction
- power dissipation
- image sensor
- cmos technology
- embedded systems
- design process
- vlsi circuits
- ultra low power
- real time
- wireless transmission
- design methodology
- general purpose