An efficient implementation of multi-prime RSA on DSP processor.

Anand Krishnamurthy Yiyan Tang Cathy Xu Yuke Wang

Published in: ICASSP (2) (2003)

Keyphrases

high speed
efficient implementation
instruction set
genetic algorithm
signal processing
computationally efficient
highly efficient
computer architecture
systolic array
pattern recognition
digital signal
shared memory multiprocessors