A sub-1-dB NF±2.3-kV ESD-protected 900-MHz CMOS LNA.
Giuseppe GramegnaMario PaparoPietro G. ErraticoPlacido De VitaPublished in: IEEE J. Solid State Circuits (2001)
Keyphrases
- high speed
- cmos technology
- nm technology
- low power
- normal form
- power consumption
- low cost
- transmission line
- power supply
- functional dependencies
- sensitive data
- circuit design
- vlsi circuits
- focal plane
- high frequency
- parallel processing
- low voltage
- random access memory
- database design
- data protection
- power dissipation
- privacy preserving
- reactive power
- smart card