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Challenges and performance limitations of high-k and oxynitride gate dielectrics for 90/65nm CMOS technology.
S. Y. Tan
Published in:
Microelectron. J. (2007)
Keyphrases
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cmos technology
low power
spl times
low voltage
power consumption
parallel processing
power dissipation
image sensor
low cost
high speed
mixed signal
silicon on insulator