Fast, scalable, and programmable packet scheduler in hardware.
Vishal ShrivastavPublished in: SIGCOMM (2019)
Keyphrases
- low cost
- single chip
- hardware and software
- packet scheduling
- digital signal processors
- signal processor
- general purpose
- real time
- low power
- commodity hardware
- programmable logic
- content addressable memory
- general purpose processors
- circuit design
- low latency
- computing systems
- packet loss
- hardware implementation
- scheduling algorithm
- signal processing
- resource manager
- loss probability
- quality of service
- computer systems