Design and Analysis of Low Power FinFET SRAM with Leakage Current Reduction Techniques.

K. Sarath Chandra Kakarla Hari Kishore

Published in: Wirel. Pers. Commun. (2023)

Keyphrases

low power
power consumption
single chip
power reduction
low cost
low power consumption
high speed
vlsi architecture
logic circuits
digital signal processing
cmos technology
power dissipation
mixed signal
wireless transmission
digital images
vlsi circuits
gate array
high power
low voltage
signal processor
nm technology