Impact of CNNs Pooling Layer Implementation on FPGAs Accelerator Design.
A. Muñío-GraciaJorge Fernández-BerniRicardo Carmona-GalánÁngel Rodríguez-VázquezPublished in: ICDSC (2019)
Keyphrases
- parallel implementation
- engineering design
- hardware design
- circuit design
- database
- modular design
- building blocks
- field programmable gate array
- implementation issues
- high level synthesis
- reconfigurable hardware
- rapid prototyping
- design principles
- efficient implementation
- power consumption
- design process
- user interface
- artificial intelligence
- data sets