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Throughput-Optimized Implementation of Isogeny-based Cryptography on Vectorized ARM SVE Processor.
Pengchang Ren
Reiji Suda
Vorapong Suppakitpaisarn
Published in:
CANDAR (2022)
Keyphrases
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parallel processing
computer architecture
response time
instruction set
web services
cellular automata
memory management
higher throughput
cell broadband engine architecture