Automatic Timing Model Generation by CFG Partitioning and Model Checking.
Ingomar WenzelBernhard RiederRaimund KirnerPeter P. PuschnerPublished in: DATE (2005)
Keyphrases
- model checking
- temporal logic
- formal verification
- model checker
- temporal properties
- asynchronous circuits
- finite state
- automated verification
- finite state machines
- formal specification
- partial order reduction
- pspace complete
- verification method
- process algebra
- symbolic model checking
- bounded model checking
- formal methods
- reachability analysis
- reactive systems
- timed automata
- transition systems
- computation tree logic
- epistemic logic
- linear temporal logic
- ordered binary decision diagrams