Ultra low power circuits design based on III-V group heterojunction tunnel field effect transistor.
Jipan HuangFang GaoXin'an WangHongying ChenPublished in: ASICON (2015)
Keyphrases
- chip design
- logic circuits
- design principles
- steady state
- high speed
- neural network
- high level synthesis
- field effect transistors
- engineering design
- user interface
- case study
- learning algorithm
- low cost
- design process
- expert systems
- low power
- learning environment
- design space
- circuit design
- reinforcement learning
- real time
- ultra low power