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A VLSI Design of a Pipelining and Area-Efficient Reed-Solomon Decoder.

Wei-min WangDu-yan BiXingmin DuLin-hua Ma
Published in: IEICE Trans. Inf. Syst. (2007)
Keyphrases
  • vlsi design
  • reed solomon
  • error correction
  • design methodology
  • error control
  • turbo codes