Low-Power Instruction Address Bus Coding with Xor-bits Architecture.
Chih-Peng FanChia-Hao FangPublished in: J. Circuits Syst. Comput. (2009)
Keyphrases
- low power
- high speed
- vlsi architecture
- power consumption
- low cost
- deblocking filter
- cmos technology
- high power
- mixed signal
- single chip
- vlsi circuits
- nm technology
- low power consumption
- real time
- signal processor
- coding scheme
- cmos image sensor
- logic circuits
- digital signal processing
- image sensor
- low density parity check
- vlsi implementation
- power dissipation
- power reduction
- gate array
- coding efficiency
- video sequences