Sign in
Zero-Sequence Current Reduction Technique for Electrical Machine Emulators With DC Coupling by Regulating the SVM Zero States.
Georgios Mademlis
Nimananda Sharma
Yujing Liu
Junfei Tang
Published in:
IEEE Trans. Ind. Electron. (2022)
Keyphrases
</>
data points
hyperplane
support vector machine svm
support vector machine
low voltage
support vector
pattern recognition
reinforcement learning
training data
multi class
state transition
printed circuit boards
neural network
knn
learning algorithm
machine learning
maximum margin
svm classification
state transitions