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Hierarchical design of a low power standing wave oscillator based clock distribution network.
Wei Zhang
Youde Hu
Yuxiang Huan
Zhuo Zou
Keji Cui
Dongxuan Bao
Dashan Pan
Lebo Wang
Li-Rong Zheng
Published in:
NORCAS (2016)
Keyphrases
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low power
power consumption
high speed
single chip
low power consumption
logic circuits
low cost
distribution network
vlsi architecture
gate array
digital signal processing
power dissipation
mixed signal
cmos technology
power reduction
vlsi circuits
real time
optimization problems
ultra low power