Full-Chip Interconnect Power Estimation and Simulation Considering Concurrent Repeater and Flip-Flop Insertion.

Weiping Liao Lei He

Published in: ICCAD (2003)

Keyphrases

power dissipation
power consumption
chip design
low power
flip flops
high speed
cmos technology
digital signal processing
power management
low cost
design methodology
finite state machines
estimation algorithm
signal processing
physical design
simulation model
mathematical model
pattern recognition