A Verifier of Directed Acyclic Graphs for Model Checking with Memory Consistency Models.
Tatsuya AbePublished in: Haifa Verification Conference (2017)
Keyphrases
- model checking
- directed acyclic graph
- temporal logic
- reactive systems
- finite state machines
- finite state
- verification method
- model checker
- automated verification
- formal verification
- temporal properties
- bounded model checking
- computation tree logic
- probabilistic model
- structural learning
- formal methods
- causal models
- directed graph
- epistemic logic
- symbolic model checking
- formal specification
- concurrent systems
- transition systems
- reachability analysis
- random walk