Login / Signup

Switching well noise analysis and minimization strategy for low V/sub th/ CMOS integrated circuits.

Akio KoyamaMasatoshi TsugeJun'ya KudoTatsuhiro AidaMakio Uchida
Published in: CICC (1999)
Keyphrases
  • integrated circuit
  • statistical analysis
  • high speed
  • data analysis
  • low cost
  • real time
  • neural network
  • image analysis
  • signal to noise ratio