FPGA implementation of a scheduler supporting parallel dataflow execution.
Junneng ZhangChao WangXi LiXuehai ZhouPublished in: ISCAS (2013)
Keyphrases
- fpga implementation
- parallel execution
- parallel computing
- field programmable gate array
- hardware implementation
- data flow
- control flow
- parallel programming
- data partitioning
- parallel processing
- shared memory
- massively parallel
- parallel implementation
- image processing algorithms
- cost model
- parallel computation
- scheduling algorithm
- distributed memory
- parallel algorithm
- dynamic reconfiguration
- multithreading
- neural network
- quality of service
- probabilistic model
- image analysis