A 700mV low power low noise implantable neural recording system design.

Guanglei An Chriswell Hutchens Robert L. Rennaker

Published in: EMBC (2014)

Keyphrases

low power
low power consumption
single chip
low cost
power consumption
high speed
logic circuits
gate array
vlsi architecture
digital signal processing
cmos technology
power dissipation
vlsi circuits
power reduction
wireless transmission
mixed signal
image sensor
noise model
high power
design process
real time