A reconfigurable 2-D IDCT architecture for HEVC encoder/decoder.
Ahmed KilanyMaher AbdelrasoulAhmed ShalabyMohammed Sharaf SayedPublished in: ICM (2015)
Keyphrases
- video codec
- video encoder
- low complexity
- video coding
- discrete cosine transform
- transform domain
- distributed video coding
- video compression
- rate distortion
- inter frame
- video coding standard
- low power
- motion compensation
- dct domain
- motion estimation
- decoding process
- motion compensated
- video quality
- low bit rate
- power consumption
- wyner ziv
- hardware implementation
- low cost
- bit rate
- image sequences
- spatial domain
- high speed
- image compression
- real time
- bit allocation
- error resilience
- macroblock
- computational complexity
- image quality
- dct coefficients
- bit plane
- video conferencing
- video signals
- motion vectors
- video coder