A hardware-based multi-objective thread mapper for tiled manycore architectures.
Ravi Kumar PujariThomas WildAndreas HerkersdorfPublished in: ICCD (2015)
Keyphrases
- multi objective
- parallel architectures
- evolutionary algorithm
- multi objective optimization
- optimization algorithm
- parallel processing
- massively parallel
- multiobjective optimization
- genetic algorithm
- objective function
- particle swarm optimization
- multiple objectives
- low cost
- conflicting objectives
- hardware and software
- real time
- bi objective
- high end
- nsga ii
- evolutionary optimization
- graphics processing units
- genetic programming
- multi core processors
- multi objective optimization problems
- multi objective evolutionary
- computing power
- parallel computers
- vlsi implementation
- optimum design
- shared memory
- embedded systems
- efficient implementation
- computer systems
- parallel hardware
- multi objective genetic algorithms
- simulated annealing and tabu search
- multiobjective evolutionary algorithm
- heterogeneous computing
- memory hierarchy
- field programmable gate array
- pareto optimal
- parallel computing
- parallel implementation
- image processing