Login / Signup
An FPGA based decimation filter processor design for real-time continuous-time Σ-Δ modulator performance measurement and evaluation.
Sevket Cetinsel
Richard C. S. Morling
Izzet Kale
Published in:
ECCTD (2011)
Keyphrases
</>
real time
high speed
formative evaluation
user interface
single chip
data acquisition
noise reduction
computer architecture
general purpose
design process
hardware architecture
sigma delta