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A Two-stage Training Framework for Hardware Constraints of Computing-in-Memory Architecture.
Hao-Wen Kuo
Rui-Hsuan Wang
Zhaofang Li
Shih-Ting Lin
Meng-Fan Chang
Kea-Tiong Tang
Published in:
APCCAS (2022)
Keyphrases
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software architecture
real time
design principles
computing power
hardware implementation
training data
probabilistic model
operating system
parallel processing
associative memory
hardware and software
storage devices
spatial constraints
architectural design
memory management
layered architecture