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Efficient hardware implementation of 8 × 8 integer cosine transforms for multiple video codecs.

Khan A. WahidMuhammad MartuzaMousumi DasCarl McCrosky
Published in: J. Real Time Image Process. (2013)
Keyphrases
  • hardware implementation
  • efficient implementation
  • video codec
  • signal processing
  • software implementation
  • rate distortion
  • video coding
  • image processing algorithms
  • dedicated hardware
  • pipelined architecture