Controlling Ground Bounce Noise in Power Gating Scheme for System-on-a-Chip.

Masud H. Chowdhury Juliana Gjanci Pervez Khaled

Published in: ISVLSI (2008)

Keyphrases

ibm power processor
low cost
noise level
high speed
chip design
noise model
signal to noise ratio
physical design
vlsi implementation
missing data
noise reduction
additive noise
noisy data
image noise
power management
median filter
lung cancer
analog vlsi
power consumption