An efficient hardware implementation of a novel unary Spiking Neural Network multiplier with variable dendritic delays.
Carlos DiazGiovanny SánchezGonzalo Duchen-SanchezMariko NakanoHéctor M. Pérez MeanaPublished in: Neurocomputing (2016)
Keyphrases
- hardware implementation
- spiking neural networks
- signal processing
- biologically inspired
- efficient implementation
- software implementation
- image processing algorithms
- fpga implementation
- dedicated hardware
- hardware design
- field programmable gate array
- feed forward
- pairwise
- spiking neurons
- cerebellar model
- neuron model
- real time
- motor control
- biologically plausible
- learning rules
- artificial neural networks
- feature extraction
- fpga device
- neural network