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Reliability aware throughput management of chip multi-processor architecture via thread migration.
Fatemeh Pouyan
Ali Azarpeyvand
Saeed Safari
Sied Mehdi Fakhraie
Published in:
J. Supercomput. (2016)
Keyphrases
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multi processor
network on chip
program execution
shared memory
single processor
management system
multi core processors
high speed
response time
low cost
data management
image segmentation
pairwise
fine grained
parallel machines
distributed memory