Login / Signup
Leveraging Delay Slack in Flip-Flop and Buffer Insertion for Power Reduction.
Lucanus J. Simonson
King Ho Tam
Nataraj Akkiraju
Mosur Mohan
Lei He
Published in:
ISQED (2004)
Keyphrases
</>
power dissipation
power reduction
flip flops
power consumption
low power
cmos technology
finite state machines
high speed
digital signal processing
neural network
wireless sensor networks
power saving
design methodology
energy efficiency
low cost
computing systems
signal processing