Login / Signup

An integrated voice codec and echo canceller implemented in a single DSP processor.

P. J. WilsonJ. M. PuetzAlan McCreeD. T. Wang
Published in: ICASSP (1986)
Keyphrases
  • digital signal processor
  • high speed
  • systolic array
  • neural network
  • signal processing
  • multiresolution
  • text to speech
  • digital signal
  • low complexity
  • parallel processing
  • processor core